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ABF Substrate: Structure, Manufacturing and Design Requirements

Illustration of ABF substrate build-up layers and core for a manufacturing and design guide

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    An ABF substrate is a multilayer IC package substrate that uses Ajinomoto Build-up Film as an insulating dielectric in its build-up layers. Copper traces and microvias carry signals and power between the semiconductor die and the package connections. ABF substrate design brings together routing density, material properties, power delivery, mechanical stability and the manufacturer’s process limits.

    high-precision flip-chip die bonding assembly on organic ic substrate

    ABF is the dielectric film within the substrate. The finished substrate also includes copper circuitry, vias, pads and other materials. Ajinomoto describes the film as a thermosetting material made with epoxy resins, a hardener and inorganic filler. Its surface supports laser processing and copper plating. Ajinomoto’s ABF overview explains these material and processing characteristics.

    In a flip-chip ball grid array, or FC-BGA, the die connects to the substrate through fine-pitch interconnects. The substrate distributes those connections to the ball array that joins the package to a system PCB. CPUs, GPUs and other devices with dense connections use this type of package architecture.

    An interposer can add another routing structure inside the package. It is separate from the package substrate. TSMC’s CoWoS platform illustrates architectures that use silicon or redistribution-layer interposers. Keep interposer dimensions and routing capabilities separate from the specifications for the substrate beneath it.

    If you design a PCB around a purchased, packaged processor, its internal substrate normally comes with the component. Your work centers on the package land pattern, PCB escape routing, power delivery and board assembly requirements.

    A team developing a custom die package has different responsibilities. It may need to define the substrate, coordinate with the packaging provider and approve fabrication requirements. Custom packaging or joint development can change this division of work. Before requesting a quote, establish whether the purchase covers a bare substrate, an assembled package or a system PCB.

    A layer count needs a written definition. Copper layers, ABF dielectric layers and build-up cycles describe different parts of the construction.

    The following teaching example defines a 2+2+2 structure as two added copper routing layers above a two-copper-layer core, plus two added copper routing layers below it. The count is six copper layers in total. Four ABF dielectric layers separate the added copper layers from each other and from the core copper.

    This is a simplified illustration, not a qualified production stackup. The notation is defined here for this example; confirm how each supplier uses it. Copper layers used as planes still count as copper layers. Solder mask, surface finish and solder balls are outside this example’s routing-layer count.

    Also ask whether build-up cycles are counted per side or as processing rounds that work on both sides. Neither a quoted layer count nor a cycle count replaces a layer-by-layer stackup drawing.

    Package substrates can use a core or a coreless construction. SHINKO’s DLL and DLL3 substrate descriptions show both approaches. The coreless option removes the permanent core from the finished structure.

    A coreless design needs its own handling and mechanical review. Do not carry over the example above or a cored design’s fabrication rules without supplier confirmation.

    ABF substrate manufacturing combines dielectric build-up, laser via formation and fine copper patterning. The sequence below describes a typical cored construction. Material grades, cure steps and equipment settings depend on the qualified process.

    1. Prepare the core. Form the required core circuitry and through-connections, then prepare its surfaces for build-up. Confirm dimensions and registration references before adding layers.
    2. Laminate the ABF dielectric. Apply the film using the material supplier’s processing requirements. Control dielectric thickness, coverage and adhesion, including the required cure sequence.
    3. Form laser microvias. Open connections to the underlying copper pads. Laser selection depends on the material and process. SHINKO lists both CO₂ and UV laser via formation in its substrate technology.
    4. Clean and condition the surface. Remove drilling residue and prepare the dielectric and exposed copper for metallization. Surface preparation must support reliable copper adhesion and via connections.
    5. Form the copper circuits. A semi-additive process, or SAP, uses a thin conductive seed layer, pattern imaging and selective copper plating. After resist removal, unwanted seed copper is removed to isolate the circuits.
    6. Repeat the build-up sequence. Add the required dielectric, via and copper structures. Check registration and dimensions through the build rather than relying only on final inspection.
    7. Complete and inspect the substrate. Apply the specified protective layers and surface finish, then perform the agreed electrical, dimensional and structural checks before shipment.

    Modified semi-additive processing, or mSAP, uses a different starting copper structure and process sequence. Confirm the supplier’s actual route instead of treating SAP and mSAP as interchangeable names. MKS’ Atotech describes SAP metallization for ABF materials and separate mSAP processing equipment.

    Agree on the construction and design rules before detailed routing locks in features that the supplier cannot produce reliably. Review critical dimensions as a complete structure, including their tolerances.

    Record copper layer assignments, finished copper thicknesses, dielectric thicknesses, material grades and total thickness. Include the core construction where applicable. State which values are targets and which have agreed acceptance limits.

    For each microvia structure, confirm diameter, depth, landing pad, registration allowance and filling requirements. Specify whether vias are stacked or staggered. A via geometry approved for one layer pair may need a separate review when its depth or underlying structure changes.

    Review copper distribution across the substrate as well. Balance the stackup where the package permits, and coordinate local copper density with the fabricator. Leave room to adjust the construction before final routing release.

    Signal integrity analysis should include the relevant package channel: traces, vias, pads, package connections and the PCB transition. Use dielectric constant, or Dk, and dissipation factor, or Df, with their test frequency and method. Record the material grade and model assumptions rather than assigning one value to every ABF material.

    Confirm reference-plane continuity, return paths, impedance targets and loss budgets. Include the expected conductor geometry and copper roughness in the analysis where they affect the channel.

    For power integrity, provide rail currents, allowable voltage drop and noise targets. Review power and ground paths, via allocation and decoupling placement before signal routing consumes the available space.

    A published minimum line width and spacing does not establish that the supplier has qualified your entire construction. Ask what was built, in which material, at what copper thickness and at which manufacturing stage.

    Capability to confirmConditions to matchEvidence to request
    Fine-line routingMaterial, copper thickness, layer and substrate sizeApproved design rules and representative measurement records
    Microvias and stacked viasDepth, diameter, landing pads and layer sequenceRelevant cross-sections and interconnect verification results
    Dimensional controlStackup, panel format and finished outlineRegistration and dimensional records for a comparable construction
    Warpage controlBare or assembled state, size and temperatureMeasurement method and results under stated conditions
    Production readinessFabrication site, process route and similar structuresQualification status, lot traceability and available production data

    Separate development demonstrations, prototype results and production evidence. These are different levels of support. A single prototype may establish feasibility without establishing repeatability across production lots.

    Ask suppliers to explain any mismatch between their evidence and your design. The table is a review framework; it is not a statement that every supplier has every record available for public release.

    An ABF build-up structure is worth evaluating when dense package routing, microvia connections and the required electrical performance call for it. A BT-based construction may meet the requirements with a well-established fabrication route.

    The material names alone do not determine the choice. ABF identifies a build-up dielectric film, while BT identifies a resin system used in package laminates and prepregs. Mitsubishi Gas Chemical’s BT material lineup includes materials for BGA, flip-chip and other package applications, including grades aimed at low transmission loss.

    Project questionSelection approach
    Can the connections be routed?Compare qualified line/space, via structures, layer count and available routing area
    Will the channel meet its targets?Compare specific material data and simulated or measured channel performance
    Will the package remain mechanically suitable?Review the complete stackup, package size, assembly materials and thermal conditions
    Can the design be produced consistently?Review the supplier’s evidence for a comparable construction
    Which option meets the project cost target?Compare quotes with the same scope, quantity and qualification requirements

    Avoid assigning a universal cost premium or a fixed performance ranking to either family. Select the material and manufacturing route together.

    An ABF substrate request for quotation should define the intended product and expose unresolved assumptions. Use a controlled revision so suppliers quote the same design.

    Include the package outline, die dimensions, bump map, ball map, mechanical datums, orientation and keepouts. Add the preliminary stackup, routing constraints, material requirements and proposed via structures. State whether a supplied map is viewed from the die side or the board side.

    Provide electrical targets, power requirements, operating conditions and the planned assembly profile. Identify required inspections, reliability work and deliverable reports. Mark which features are fixed and which the supplier may optimize.

    For an early review, label incomplete information and assumptions clearly. Before fabrication, resolve the open items in an approved drawing, stackup and design-rule record. Include a revision identifier in each file and a package-level file list to prevent mixed revisions.

    Separate recurring part price from non-recurring engineering, or NRE. List tooling, test fixtures, engineering work, qualification lots, reports and assembly as separate inclusions or exclusions. Confirm quantity, currency, quote validity, delivery terms and the definition of an accepted part.

    Ask how yield assumptions affect the commercial terms. Establish whether the price applies to accepted substrates or input quantity, and how rejected material or repeat qualification work is handled. These details can change the comparison more than the headline unit price.

    Project milestoneWhat to confirm before accepting the schedule
    Feasibility and rulesRequired inputs, review owner and open design decisions
    Material preparationApproved grade, availability and substitution approval
    Tooling and releaseFile revision, artwork, test hardware and release authorization
    FabricationQueue allocation, manufacturing start and inspection scope
    QualificationTest vehicles, sample availability, test duration and report review
    Production rampApproval gates, reserved capacity and repeat-order assumptions

    Ask which steps overlap and which depend on earlier approval. A fabrication lead time may exclude material procurement, engineering review or qualification. State the event that starts the quoted clock and agree how design changes affect delivery.

    Inspection checks the delivered substrate against its specification. Qualification evaluates whether a defined construction and process can meet the intended reliability requirements. Passing shipment inspection does not establish the reliability of every assembled package built with that substrate.

    A bare substrate and an assembled package have different structures and loading conditions. Die attachment, underfill, molding, lids or stiffeners can change the package’s mechanical behavior. Assign inspection and qualification responsibilities to the fabricator, assembly provider and customer before ordering samples.

    Use an acceptance record that states the object being checked, its condition, the method and the acceptance criteria. The following table provides fields to agree, not universal limits.

    CheckObject and conditionInformation to define
    Continuity and isolationBare substrate at the agreed test stageNetlist revision, coverage, test conditions and pass/fail criteria
    Dimensions and registrationFinished substrate or agreed test couponDatums, measurement locations, method, tolerances and sampling
    Via structureRepresentative section or test vehicleLayer pairs, section locations, defect criteria and sampling basis
    WarpageBare substrate or assembled package, identified separatelyTemperature history, measured surface, reference plane and limits
    ReliabilityDefined substrate vehicle or assembled packagePreconditioning, stress sequence, sample size, monitoring and failure criteria

    Match reliability work to the expected failure mechanisms and operating conditions. Record test temperatures, dwell times, ramps and read points where applicable. A generic statement such as “thermal cycling passed” omits the information needed to judge relevance.

    Choose applicable test methods and current document revisions with the responsible engineering teams. Referencing a PCB specification alone does not define all acceptance requirements for a semiconductor package.

    Specify the sample state before discussing a warpage limit. Identify whether the measurement covers a bare substrate, a package before ball attachment or the completed package. Record moisture conditioning, prior thermal exposure and any fixtures or supports used.

    Define the measured surface, reference plane, sign convention and temperature points or heating profile. Specify how the result is calculated and reported. A room-temperature reading cannot describe shape changes throughout assembly heating.

    BGA package warpage during reflow can affect solder-joint formation. Texas Instruments describes this assembly risk in its PoP assembly report, which examines thermal warpage in a specific package configuration.

    Agree on limits for the actual assembly process and package geometry. Preserve the temperature-dependent results so a later solder-joint problem can be compared with the package’s measured behavior.

    Review the changed material properties, cured thickness, adhesion, laser response and electrical model. Have the supplier identify which process steps and qualification results remain applicable. Approve any required validation before releasing the changed construction.

    Use them as a starting point, then confirm the material, copper thickness, via structure, layer count and package size. Obtain supplier approval for the new construction rather than assuming that every rule transfers.

    Additional layers can create routing options, but they also add fabrication and verification work. Select the layer count through routing, power, mechanical and manufacturing reviews. The target is a construction that meets the requirements with adequate process margin.

    Request a proposed stackup, confirmed design rules, exceptions, unresolved inputs and a clear scope of supply. Record the evidence or validation needed before fabrication and before production. Assign an owner and revision to each agreed change.

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    Picture of Frank Fan
    Frank Fan

    Frank Fan is a PCB Engineer at SLLPCB. He writes technical articles about PCB technology, fabrication and assembly, sharing practical knowledge with engineers and buyers.

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